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Go on a date in a gay-friendly place. 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device, and specifically a method of forming the interconnects of a semiconductor device. More precisely, the present invention pertains to a method of forming buried interconnects, via-holes, or other interconnects that are formed by interconnecting upper and lower wiring layers. 2. De ion of the Related Art FIGS. 5 and 6 are sectional views that respectively show the steps of a conventional method of manufacturing a semiconductor device. FIG. 5(a) shows a state wherein a semiconductor substrate 51 has been provided with a wiring layer 53 which consists of the first wiring layer, in the upper interlayer dielectric film 55, and with a first conductive polysilicon layer 57 that is to become a barrier metal or a buffer layer, in the lower interlayer dielectric film 53. Next, the surface of the semiconductor substrate 51 is planarized by a planarizing method, which can be either the chemical mechanical polishing (CMP) method or etch back method. The chemical mechanical polishing method is detailed later. As the semiconductor devices have higher integration and higher densities, a planarization technology is essential.
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